Title	A High-Throughput FPGA Implementation of Quasi-Cyclic LDPC Decoder
Author	Hossein Gharaee, Mahdie Kiaee, Naser Mohammadzadeh
Citation	Vol. 17  No. 3  pp. 140-149
Keywords	QC-LDPC decoder, Time Scheduling, TPMP Algorithm, FPGA Implementation

Title	Designing and construction of an infrared scene generator for using in the hardware-in-the-loop simulator
Author	Mehdi Asghari Asl, Ali Reza Erfanian
Citation	Vol. 17  No. 3  pp. 124-132
Keywords	Infrared scene generator, hardware in the loop, infrared seeker, FPGA, generator error

Title	Performance study and synthesis of new Error Correcting Codes RS, BCH and LDPC Using the Bit Error Rate (BER) and Field-Programmable Gate Array (FPGA)
Author	El habti El idrissi Anas, El gouri Rachid, Ahmed Lichioui, Hlou Laamari
Citation	Vol. 16  No. 5  pp. 21-28
Keywords	Error correcting codes, FPGA implementation, Hardware Description Language (VHDL), FPGA Device Utilization Summary, Bit Error Rate, Minimization Rate

Title	Encryption Design Based on FPGA using VHDL
Author	Murtada M. Abdulwahab, Abdul Rasoul J. Alzubaidi
Citation	Vol. 12  No. 12  pp. 96-100
Keywords	VHDL, ISE9.2i, FPGA, Encryption