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Title
A Novel FPGA Implementation of AES-128 using Reduced Residue of Prime Numbers based S-Box
Author
Muhammad H. Rais, Syed M. Qasim
Vol. 9 No. 9 pp. 305-309
Keywords
Advanced Encryption Standard (AES), Very High Speed Integrated Circuit Hardware Description Language (VHDL), Field Programmable Gate Array (FPGA), Virtex-5
High Precision Navigation Control with Integrated INS/GPS System
G. Laxminarayana, N.S. Murthy Sharma, K. Lal Kishore
Vol. 9 No. 9 pp. 301-304
Inertial Navigation System, Global Positioning Syste, Kalman Flter, Strapdown System
An Adaptation of Social Learning in Evolutionary Computation for Tic-Tac-Toe
Razali Yaakob, Graham Kendall
Vol. 9 No. 9 pp. 294-300
Evolutionary strategies, neural network, individual learning, social learning, Tic-Tac-Toe
Rank Analysis Through Polyanalyst using Linear Regression
N. Sandhya, K. Anuradha, Sk.Althaf.H. Basha, P. Premchand, A.Govardhan
Vol. 9 No. 9 pp. 290-293
Data Mining, PolyAnalyst, Linear Regression