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Title
A High-Throughput FPGA Implementation of Quasi-Cyclic LDPC Decoder
Author
Hossein Gharaee, Mahdie Kiaee, Naser Mohammadzadeh
Vol. 17 No. 3 pp. 140-149
Keywords
QC-LDPC decoder, Time Scheduling, TPMP Algorithm, FPGA Implementation
Increasing the scalability and reliability of AODV routing protocol in mobile vehicular ad hoc networks using multi-verse meta-heuristic Algorithm
Vahid Abdolhosseini
Vol. 17 No. 3 pp. 133-139
vehicular network, clustering, increasing scalability, Vanet, Aodv, Mvo
Designing and construction of an infrared scene generator for using in the hardware-in-the-loop simulator
Mehdi Asghari Asl, Ali Reza Erfanian
Vol. 17 No. 3 pp. 124-132
Infrared scene generator, hardware in the loop, infrared seeker, FPGA, generator error
Privacy in Location Based Services (LBS) via Composite Functions: The L4NE Protocol
Levent Ertaul
Vol. 17 No. 3 pp. 117-123
Location Based Services (LBS), Privacy, Private Equality Testing, Private Proximity Testing.