Title	Virtex-5 FPGA Based Braun’s Multipliers
Author	Muhammad H. Rais, Mohammed H. Al Mijalli
Citation	Vol. 11  No. 8  pp. 81-84
Keywords	Brauns multipliers, Digital Signal Processing (DSP), Field Programmable Gate Array (FPGA), Virtex-5, VHDL

Title	Delay Study of Virtex-2, Virtex-4 and Spartan-3E Based Truncated Multipliers
Author	Mohammed H. Al Mijalli
Citation	Vol. 11  No. 7  pp. 68-71
Keywords	Digital Signal Processing (DSP), Field Programmable Gate Array (FPGA), Spartan-3E, Truncated Multiplier, Virtex-2, Virtex-4, VHDL.

Title	FPGA Based Fixed Width 4×4, 6×6, 8×8 and 12×12-Bit Multipliers using Spartan-3AN
Author	Muhammad H. Rais, Mohamed H. Al Mijalli
Citation	Vol. 11  No. 2  pp. 61-68
Keywords	Digital Signal Processing (DSP), Field Programmable Gate Array (FPGA), Spartan-3AN, Truncated Multiplier VHDL

Title	FPGA Implementation of NLMS Algorithm for Receiver in wireless communication system
Author	K. R. Rekha, B. S. Nagabushan, K.R..Nataraj
Citation	Vol. 10  No. 12  pp. 72-86
Keywords	Adaptive filters, Digital signal processing, FPGA NLMS, LMS