To search, Click below search items.
All Published Papers Search Service
Title
Efficient Hardware Realization of Advanced Encryption Standard Algorithm using Virtex-5 FPGA
Author
Muhammad H. Rais, Syed M. Qasim
Vol. 9 No. 9 pp. 59-63
Keywords
Advanced Encryption Standard (AES), FPGA, VHDL, Virtex-5
A Novel FPGA Implementation of AES-128 using Reduced Residue of Prime Numbers based S-Box
Vol. 9 No. 9 pp. 305-309
Advanced Encryption Standard (AES), Very High Speed Integrated Circuit Hardware Description Language (VHDL), Field Programmable Gate Array (FPGA), Virtex-5
Efficient FPGA Realization of S-Box using Reduced Residue of Prime Numbers
Vol. 10 No. 1 pp. 69-74
Advanced Encryption Standard (AES), S-Box, FPGA, VHDL, Virtex-5
FPGA Based Fixed Width 4¡¿4, 6¡¿6, 8¡¿8 and 12¡¿12-Bit Multipliers using Spartan-3AN
Muhammad H. Rais, Mohamed H. Al Mijalli
Vol. 11 No. 2 pp. 61-68
Digital Signal Processing (DSP), Field Programmable Gate Array (FPGA), Spartan-3AN, Truncated Multiplier VHDL