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Title
ON SUITABILITY OF FPGA BASED EVOLVABLE HARDWARE SYSTEMS TO INTEGRATE RECONFIGURABLE CIRCUITS WITH HOST PROCESSING UNIT
Author
P.Nirmalkumar, J.Raja Paul Perinbam, S.Ravi, B.Rajan
Vol. 6 No. 9 pp. 216-222
Keywords
Virtual Reconfigurable circuit, Power Analysis, Evolvable hardware
16- Directional Geographical Traceback (DGT16) with Generalization to 2n (n>4) Directions
A.Rajiv Kannan, J.Rajavel, K.Duaraiswamy, K.Thiyagarajah, V.Suresh
Vol. 8 No. 11 pp. 221-225
DGT16, Traceback, Generalization
A Survey On Active Queue Management Mechanisms
G.Thiruchelvi, J.Raja
Vol. 8 No. 12 pp. 130-145
Active Queue Management, Congestion Control, Queue length, Link utilization, TCP, Non-TCP
An Effective Mechanism for Congestion Control in High Speed Networks
T.Sheela, J.Raja
Vol. 9 No. 4 pp. 62-70
TCP/IP, Congestion Control, Window Management, Feedback Control, Queue Management, Explicit Control