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Title
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FPGA based System on Chip IPTV Set Top Box
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Author
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P Kaythry K J Jegadish Kumar
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Citation |
Vol. 17 No. 2 pp. 113-118
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Abstract
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IPTV is mainly used for Live Streaming, Time Shifting and provide Videos on Demand (VOD). Current Ethernet transmission system on chips (SoC) designs supports 100 Mbps data rate and is transmitted as packets through the ethernet cable. Generally, processor accesses the memory and stores the data in the form of frames. In this paper, an Ethernet with High Definition Multimedia Interface (HDMI) SoC design is proposed to provide high quality picture transmission at the rate of 1Gbps. The encoded video data from the Ethernet is processed by HDMI video decoder in such a way to provide the maximum quality of 1080p. The System is implemented in Zedboard Zynq evaluation kit with FPGA device part number xc7z020clg484-1 using Vivado tool. The implementation cost 7.88% of Look Up Tables(LUTs) and 4.84 % of Flipflop(FF) in the device. The power consumption of the device is estimated to 1.783 watts.
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Keywords
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System on Chip, IPTV, HDMI, Set Top Box.
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URL
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http://paper.ijcsns.org/07_book/201702/20170215.pdf
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