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Title |
NOC-based Embedded Systems Co-synthesis ? Developmental Genetic Programming Approach |
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Author |
Dariusz Dorota |
| Citation |
Vol. 13 No. 11 pp. 18-27 |
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Abstract |
In the presented paper presents a new method to generate the architecture of embedded systems based on the developmental genetic programming. Previously used methods, based on developmental genetic programming in their chromosomes represent solutions. In the presented approach, chromosomes are used to construct a system. Evolution in the depicted case does not concern but the co-synthesis process. A proposal of represent the process in the form of trees forming so-called. Genotype. Despite the fact that the architecture of Network-on-Chip (NoC) is an interesting alternative to a bus architecture based on multi-processors systems, it requires a lot of work that ensures the optimization of communication. This paper proposes an effective approach to generate dedicated NoC topology solving communication problems. Network NoC is generated taking into account the energy consumption and resource issues. Ultimately generated is minimal, dedicated NoC topology. The proposed solution is assumed to be a simple router design and the minimum number of lines. |
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Keywords |
Network on Chip, NoC-based embedded system co-synthesis, Developmental Genetic Programming. |
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URL |
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|
Title |
NOC-based Embedded Systems Co-synthesis ? Developmental Genetic Programming Approach |
|
Author |
Dariusz Dorota |
| Citation |
Vol. 13 No. 11 pp. 18-27 |
|
Abstract |
In the presented paper presents a new method to generate the architecture of embedded systems based on the developmental genetic programming. Previously used methods, based on developmental genetic programming in their chromosomes represent solutions. In the presented approach, chromosomes are used to construct a system. Evolution in the depicted case does not concern but the co-synthesis process. A proposal of represent the process in the form of trees forming so-called. Genotype. Despite the fact that the architecture of Network-on-Chip (NoC) is an interesting alternative to a bus architecture based on multi-processors systems, it requires a lot of work that ensures the optimization of communication. This paper proposes an effective approach to generate dedicated NoC topology solving communication problems. Network NoC is generated taking into account the energy consumption and resource issues. Ultimately generated is minimal, dedicated NoC topology. The proposed solution is assumed to be a simple router design and the minimum number of lines. |
|
Keywords |
Network on Chip, NoC-based embedded system co-synthesis, Developmental Genetic Programming. |
|
URL |
