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Title |
Self-Repairable Reconfigurable Circuit using Embedded Autonomously Restructuring Cores |
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Author |
Irala.Suneetha, T.Venkateswarlu |
| Citation |
Vol. 10 No. 7 pp. 142-153 |
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Abstract |
Field Programmable Gate Arrays (FPGA) are widely used to implement complex systems. It can be reprogrammed in a system and allows a system using reconfigurable hardware to adapt to changes in external environment. They are used to extend initial capabilities by implementing new functions on the same hardware platform. A FPGA typically consists of a number of configurable logic blocks (CLBs) arranged in rows and columns. Based on the application, some CLBs are activated and other CLBs are kept as spare resources. When any activated CLB becomes faulty, it is possible to repair permanent internal faults in FPGA by using back up circuits. However, this approach becomes complex when the size of the FPGA increases and optimal algorithms need to coexist to make it suitable for online use. In this work, an autonomous restructuring circuit is designed with an objective to reduce the latency, (i.e.) the speed with which the faulty CLBs can be identified and replaced is to be reduced. Also, when any fault occurs in the active CLB, the fault is rectified using the spare CLB in an autonomous way. |
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Keywords |
Autonomous Recover(AR), Configuration Bits(CFB), Configuration Logic Block(CLB), Field Programmable Gate Array(FPGA), Look Up Table(LUT) |
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