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Title

Design and Implementation of FPGA-Based Modified BKNN Classifier

Author

Jihong Liu, Baorui Li, Deqin Liang

Citation

Vol. 7  No. 3  pp. 67-71

Abstract

Artificial Neural Network (ANN) is an important tool for Pattern Recognition in Artificial Intelligence field. In this paper, we presented a hardware implementation of ANN based on modification of Boolean k-nearest neighbor (BKNN) classifier proposed by Gazula and Kabuka. BKNN is a kind of supervised classifier using Boolean Neural Network, which has binary inputs and outputs, integer weights, fast learning and classification, and guaranteed convergence. The emphasis of this design is that it is implemented on Field Programming Gate Array (FPGA) chip through Verilog HDL codes programming so that the classifier can be more convenient to be carried and reconfigurable. The satisfying experimental results demonstrate that the modified version of BKNN is characteristic with fast, robust classification ability. It offers the Artificial Intelligence a significant tool in both computer vision and pattern recognition.

Keywords

FPGA, Artificial Neural Network, Boolean k-nearest neighbor

URL

http://paper.ijcsns.org/07_book/200703/20070311.pdf