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Title |
VLIW Cryptoprocessor: Architecture and Performance in FPGAs |
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Author |
F?bio Dac?ncio Pereira, Edward David Moreno Ordonez, Rodolfo Barros Chiaramonte |
| Citation |
Vol. 6 No. 8 pp. 151-160 |
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Abstract |
This work is intended for presenting the proposal and implementation of a VLIW cryptoprocessor, as well as discussing architecture details and specifying its instruction set. The cryptoprocessor was designed to execute symmetric cryptography algorithms preferentially. To do so, special modules was described in order to increase the performance and simplify the source program. The cryptoprocessor was described using VHDL language, and a prototype was synthesized and implemented in a FPGA Virtex II Pro generating occupation statistic data and temporary performance, both presented in this paper. This cryptoprocessor supports a number of symmetric algorithms including current ones which uses 128-bit keys or more. It is important to stress that the special modules which makes the cryptoprocessor different are not specific to a certain cryptography algorithm, and they were projected in order to be preconfigured according to the characteristics of the algorithm to be executed |
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Keywords |
VLIW Architecture, cryptoprocessor, FPGAs and performance statistics. |
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