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Title

A Processor Development Environment C-DASH

Author

Hideaki Yanagisawa, Minoru Uehara, Hideki Mori

Vol. 6  No. 1  pp. 227~233

Abstract

Processor development involves the generation of both the HW (Hardware) design and the SWDE (Software Development Environment). The SWDE includes simulators, assemblers, disassemblers and compilers. A HDL language such as VHDL and Verilog has generally been used in hardware development. This style is suitable for a low-level description of architecture, but lacks the ability to describe a high-level architecture such as the instruction set description etc. A design method based on an instruction set level and/or architecture level that automatically generates a HW (synthesizable HDL description) and a SWDE will shorten the development time for new processors. We therefore have developed a HW/SW co-design system for processor design. C-DASH is a high-level processor development environment based on an ISA (Instruction Set Architecture) level Input and it is possible to generate HW (synthesizable Verilog-HDL description of a processor) and SWDE (such as a simulator, an assembler, a disassembler and compiler). In this paper, we describe the processor development environment C-DASH.

Keywords

ISA (Instruction Set Architecture), HW/SW Codesign (A Processor Development Environment), C-DASH (C-like Design Automation Shell, HDL (Hardware Description Language)

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