Title	Using Dead Block Information to Minimize I-cache Leakage Energy
Author	Mohan G Kabadi, Ranjani Parthasarathi
Citation	Vol. 7  No. 5  pp. 95-105
Keywords	Power-efficient architecture, Low-leakage cache, Compiler-assisted energy optimization

Title	Some Properties of Graph ?(2N)
Author	Chawalit Iamjaroen
Citation	Vol. 7  No. 5  pp. 90-94
Keywords	Realization, Bipartite, 2-regular graph, Eulerian trail

Title	A New Method of Learning for Multi-Layer Neural Network
Author	Rong-Long Wang, Cui Zhang, Kozo Okazaki
Citation	Vol. 7  No. 5  pp. 86-89
Keywords	Multilayer neural network, Backpropagation, Local minima, Learning

Title	A New Temperature Compensation Method for a 2.5 GHz Integrated VCO
Author	Abdennaceur Kachouri, Dalenda Ben Issa, Nabil Boughanmi, Mounir SAMET
Citation	Vol. 7  No. 5  pp. 78-85
Keywords	Radiofrequency, VCO, CMOS process, compensated temperature, phase noise