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Title
FPGA Design and Implementation of Matrix Multiplier Architectures for Image and Signal Processing Applications
Author
Syed M. Qasim, Ahmed A. Telba, Abdulhameed Y. AlMazroo
Vol. 10 No. 2 pp. 168-176
Keywords
FPGA, Matrix Multiplier, Systolic Array, VLSI
Hierarchical Status Information Exchange Scheduling and Load Balancing For Computational Grid Environments
Malarvizhi Nandagopal, Rhymend V Uthariaraj
Vol. 10 No. 2 pp. 177-185
Grid Computing, Scheduling, Load Balancing, Response Time, Communication Cost
A Cipher based on 3D Array Block Rotation
P. R. Suri, Sukhvinder Singh Deora
Vol. 10 No. 2 pp. 186-191
Encoding, Decoding, Block cipher, 3D Array, Confusion-Diffusion
An Object Oriented Modeling and Implementation of Web Based ETL Process
Radha Krishna, Sreekanth
Vol. 10 No. 2 pp. 192-196
data warehouse, transformation, loading, log, extraction, UML