Title	Test Design and Optimization for Multiple Core Systems-On-a-Chip using Genetic Algorithm
Author	SAKTHIVEL, NARAYANASAMY
Citation	Vol. 6  No. 10  pp. 121-129
Keywords	Integrated Circuit, Genetic Algorithm, System-on-Chip, Pre-Designed Core, Test Vector, Test Access Mechanism, Application Specific Integrated Circuit, Benchmark Circuit

Title	Power-Oriented Test Scheduling for SOCs
Author	Wang-Dauh Tseng
Citation	Vol. 6  No. 11  pp. 102-106
Keywords	SOC, test vector reordering, power consumption, test scheduling.