Title	Implementation of A Optimized Systolic Array Architecture for FSBMA using FPGA for Real-time Applications
Author	Mohammad Mahdi Azadfar
Citation	Vol. 8  No. 3  pp. 46-51
Keywords	Full Search Block Matching Algorithm (FSBMA), parametrizable Implementation, Systolic Array Architecture, Real-Time , FPGA

Title	FPGA Design and Implementation of Matrix Multiplier Architectures for Image and Signal Processing Applications
Author	Syed M. Qasim, Ahmed A. Telba, Abdulhameed Y. AlMazroo
Citation	Vol. 10  No. 2  pp. 168-176
Keywords	FPGA, Matrix Multiplier, Systolic Array, VLSI