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Title |
DRESPA: An Integrated System for Reconfigurable High-speed Signal Processing Applications |
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Author |
Ramadass Narayanadass, Natarajan Somasundaram, J. Raja Paul Perinbam |
| Citation |
Vol. 7 No. 8 pp. 1-7 |
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Keywords |
Reconfigurable Computing, Embedded System, Digital Signal Processing, High Speed Architecture |
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Title |
EHW Architecture for Design of FIR Filters for Adaptive Noise Cancellation |
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Author |
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| Citation |
Vol. 9 No. 1 pp. 41-48 |
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Keywords |
Evolvable Hardware, Noise Cancellation, Adaptive Filter, Reconfigurable Hardware |
